Digital Circuits

Lectures

Quizzes will be on lectures
For 3pts, announced lecture before

Laboratories

1. Entry test
2. Theoretical Design
3. Schematic Assembly
4. Simulation with troubleshooting
   Assessment is made of the results of the theoretical design, simulation, report and answers to question asked
   2h introduction, 7 meetings 4h long
   50% from entry test to enter lab

Introduction laboratory - operation of logic circuit simulator and prepare for combinatorial design exercise

Inform about progress personally or on the chat.
Student work is assessed on the basis of partial results, systematically reported during the laboratory. Out-of-nowhere solutions will not be evaluated

After completing each part of lab, student submits the results in the formal report.
Results out-of-place (f.e. the end of the report) will not be evaluated.

Upload reports, Xilinx schematic and testbench files to Teams on request
Logisim software
May do laboratory with another group. Laboratories are not replayed

Additional

Activity - active participation during lecture and quizzes

Exam

Handwritten notes allowed

Lectures

1. Fundamentals of Logic Circuit Design
2. Iterative circuits
3. Combinatorial Logic
4. Sequential logic
5. Asynchronous circuits

First lab - 6-variable